22 #include "libavutil/attributes.h"
24 #include "libavutil/cpu.h"
30 #if HAVE_7REGS && HAVE_INLINE_ASM
32 extern char ff_mlp_firorder_8;
33 extern char ff_mlp_firorder_7;
34 extern char ff_mlp_firorder_6;
35 extern char ff_mlp_firorder_5;
36 extern char ff_mlp_firorder_4;
37 extern char ff_mlp_firorder_3;
38 extern char ff_mlp_firorder_2;
39 extern char ff_mlp_firorder_1;
40 extern char ff_mlp_firorder_0;
42 extern char ff_mlp_iirorder_4;
43 extern char ff_mlp_iirorder_3;
44 extern char ff_mlp_iirorder_2;
45 extern char ff_mlp_iirorder_1;
46 extern char ff_mlp_iirorder_0;
48 static const void *firtable[9] = { &ff_mlp_firorder_0, &ff_mlp_firorder_1,
49 &ff_mlp_firorder_2, &ff_mlp_firorder_3,
50 &ff_mlp_firorder_4, &ff_mlp_firorder_5,
51 &ff_mlp_firorder_6, &ff_mlp_firorder_7,
53 static const void *iirtable[5] = { &ff_mlp_iirorder_0, &ff_mlp_iirorder_1,
54 &ff_mlp_iirorder_2, &ff_mlp_iirorder_3,
59 #define MLPMUL(label, offset, offs, offc) \
60 LABEL_MANGLE(label)": \n\t" \
61 "movslq "offset"+"offs"(%0), %%rax\n\t" \
62 "movslq "offset"+"offc"(%1), %%rdx\n\t" \
63 "imul %%rdx, %%rax\n\t" \
64 "add %%rax, %%rsi\n\t"
66 #define FIRMULREG(label, offset, firc)\
67 LABEL_MANGLE(label)": \n\t" \
68 "movslq "#offset"(%0), %%rax\n\t" \
69 "imul %"#firc", %%rax\n\t" \
70 "add %%rax, %%rsi\n\t"
73 "xor %%rsi, %%rsi\n\t"
79 #define RESULT "%%rsi"
80 #define RESULT32 "%%esi"
84 #define MLPMUL(label, offset, offs, offc) \
85 LABEL_MANGLE(label)": \n\t" \
86 "mov "offset"+"offs"(%0), %%eax\n\t" \
87 "imull "offset"+"offc"(%1) \n\t" \
88 "add %%eax , %%esi\n\t" \
89 "adc %%edx , %%ecx\n\t"
91 #define FIRMULREG(label, offset, firc) \
92 MLPMUL(label, #offset, "0", "0")
95 "xor %%esi, %%esi\n\t" \
96 "xor %%ecx, %%ecx\n\t"
99 "mov %%ecx, %%edx\n\t" \
100 "mov %%esi, %%eax\n\t" \
101 "movzbl %7 , %%ecx\n\t" \
102 "shrd %%cl, %%edx, %%eax\n\t" \
104 #define ACCUM "%%edx"
105 #define RESULT "%%eax"
106 #define RESULT32 "%%eax"
110 #define BINC AV_STRINGIFY(4* MAX_CHANNELS)
111 #define IOFFS AV_STRINGIFY(4*(MAX_FIR_ORDER + MAX_BLOCKSIZE))
112 #define IOFFC AV_STRINGIFY(4* MAX_FIR_ORDER)
114 #define FIRMUL(label, offset) MLPMUL(label, #offset, "0", "0")
115 #define IIRMUL(label, offset) MLPMUL(label, #offset, IOFFS, IOFFC)
118 int firorder,
int iirorder,
120 int blocksize,
int32_t *sample_buffer)
122 const void *firjump = firtable[firorder];
123 const void *iirjump = iirtable[iirorder];
125 blocksize = -blocksize;
131 FIRMUL (ff_mlp_firorder_8, 0x1c )
132 FIRMUL (ff_mlp_firorder_7, 0x18 )
133 FIRMUL (ff_mlp_firorder_6, 0x14 )
134 FIRMUL (ff_mlp_firorder_5, 0x10 )
135 FIRMUL (ff_mlp_firorder_4, 0x0c )
136 FIRMULREG(ff_mlp_firorder_3, 0x08,10)
137 FIRMULREG(ff_mlp_firorder_2, 0x04, 9)
138 FIRMULREG(ff_mlp_firorder_1, 0x00, 8)
141 IIRMUL (ff_mlp_iirorder_4, 0x0c )
142 IIRMUL (ff_mlp_iirorder_3, 0x08 )
143 IIRMUL (ff_mlp_iirorder_2, 0x04 )
144 IIRMUL (ff_mlp_iirorder_1, 0x00 )
147 "mov "RESULT" ,"ACCUM" \n\t"
148 "add (%2) ,"RESULT" \n\t"
149 "and %4 ,"RESULT" \n\t"
151 "mov "RESULT32", (%0) \n\t"
152 "mov "RESULT32", (%2) \n\t"
153 "add $"BINC" , %2 \n\t"
154 "sub "ACCUM" ,"RESULT" \n\t"
155 "mov "RESULT32","IOFFS"(%0) \n\t"
164 "
r"(iirjump) , "c"(filter_shift)
165 , "
r"((int64_t)coeff[0])
166 , "
r"((int64_t)coeff[1])
167 , "
r"((int64_t)coeff[2])
168 : "rax", "rdx", "rsi"
171 :
"m"( mask),
"m"(firjump),
172 "m"(iirjump) ,
"m"(filter_shift)
173 :
"eax",
"edx",
"esi",
"ecx"
182 #if HAVE_7REGS && HAVE_INLINE_ASM
int av_get_cpu_flags(void)
Return the flags which specify extensions supported by the CPU.
static const uint16_t mask[17]
common internal API header
void(* mlp_filter_channel)(int32_t *state, const int32_t *coeff, int firorder, int iirorder, unsigned int filter_shift, int32_t mask, int blocksize, int32_t *sample_buffer)
#define INLINE_MMX(flags)
av_cold void ff_mlpdsp_init_x86(MLPDSPContext *c)